URL https://opencores.org/ocsvn/axi4_tlm_bfm/axi4_tlm_bfm/trunk

Subversion Repositories axi4_tlm_bfm

[/] - Rev 37

Rev	Log message	Author	Age	Path
37	Refactored nReset to reset for real hardware.	daniel.kho	3726d 11h	/
36	Added missing pkg-types.vhdl file for simulation.	daniel.kho	3753d 10h	/
35	More fixes to Windows script.	daniel.kho	3758d 20h	/
34	Added double-quotes for Windows script.	daniel.kho	3758d 20h	/
33	Removed semicolons for Windows script.	daniel.kho	3758d 20h	/
32	Added compile+simulate script for Windows.	daniel.kho	3758d 20h	/
31	Added initial Xilinx Vivado synthesis scripts and constraints.	daniel.kho	3772d 18h	/
30	Refactored synthesis scripts.	daniel.kho	3772d 19h	/
29	Updated simulation scripts.	daniel.kho	3772d 19h	/
28	Temporarily remove simulation folder.	daniel.kho	3772d 19h	/
27	Updated simulation scripts.	daniel.kho	3772d 19h	/
26	Refactored simulation folders.	daniel.kho	3772d 19h	/
25	Refactored folders.	daniel.kho	3772d 20h	/
24	Updated simulation sources to reflect changes made for synthesis.	daniel.kho	3772d 20h	/
23	Added top-level user example used in technical paper.	daniel.kho	3780d 14h	/
22	Added pin assignments for BeMicro kit. Added demo top-level used in technical paper.	daniel.kho	3780d 14h	/
21	Added synthesis files for Vivado. The RTL have not yet been updated with the latest changes available in the Quartus version.	daniel.kho	3783d 16h	/
20	Updated simulation scripts.	daniel.kho	3783d 16h	/
19	Updated synthesis constraints and scripts.	daniel.kho	3783d 16h	/
18	Added hardware PRBS generator, modularised top-level by having separate file as the tester.	daniel.kho	3783d 16h	/