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Rev Log message Author Age Path
38 Added coverage-driven randomisation to tester. daniel.kho 3707d 15h /
37 Refactored nReset to reset for real hardware. daniel.kho 3727d 05h /
36 Added missing pkg-types.vhdl file for simulation. daniel.kho 3754d 04h /
35 More fixes to Windows script. daniel.kho 3759d 14h /
34 Added double-quotes for Windows script. daniel.kho 3759d 15h /
33 Removed semicolons for Windows script. daniel.kho 3759d 15h /
32 Added compile+simulate script for Windows. daniel.kho 3759d 15h /
31 Added initial Xilinx Vivado synthesis scripts and constraints. daniel.kho 3773d 13h /
30 Refactored synthesis scripts. daniel.kho 3773d 13h /
29 Updated simulation scripts. daniel.kho 3773d 13h /
28 Temporarily remove simulation folder. daniel.kho 3773d 13h /
27 Updated simulation scripts. daniel.kho 3773d 13h /
26 Refactored simulation folders. daniel.kho 3773d 14h /
25 Refactored folders. daniel.kho 3773d 14h /
24 Updated simulation sources to reflect changes made for synthesis. daniel.kho 3773d 14h /
23 Added top-level user example used in technical paper. daniel.kho 3781d 08h /
22 Added pin assignments for BeMicro kit. Added demo top-level used in technical paper. daniel.kho 3781d 08h /
21 Added synthesis files for Vivado. The RTL have not yet been updated with the latest changes available in the Quartus version. daniel.kho 3784d 10h /
20 Updated simulation scripts. daniel.kho 3784d 10h /
19 Updated synthesis constraints and scripts. daniel.kho 3784d 10h /

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