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[/] [axi4_tlm_bfm/] [trunk/] [rtl/] [quartus-synthesis/] [pkg-axi-tlm.vhdl] - Rev 44

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44 Committed latest changes to Quartus synthesis folder and some minor changes. daniel.kho 3329d 04h /axi4_tlm_bfm/trunk/rtl/quartus-synthesis/pkg-axi-tlm.vhdl
17 Added more pipelining, enhancements. Tested on BeMicro kit. daniel.kho 3762d 07h /axi4_tlm_bfm/trunk/rtl/quartus-synthesis/pkg-axi-tlm.vhdl
13 Fixed one-cycle extra read issue, occurring during fast read. Verified on hardware as well. daniel.kho 3876d 05h /axi4_tlm_bfm/trunk/rtl/quartus-synthesis/pkg-axi-tlm.vhdl
12 Used generic package instead of using tauhop.tlm (abstract package) directly, and updated corresponding context paths. Simulated fine with ModelSim 10.1b. [previous]: Previous update included synthesis fixes ported from simulation sources. daniel.kho 3885d 09h /axi4_tlm_bfm/trunk/rtl/quartus-synthesis/pkg-axi-tlm.vhdl
9 Added synthesis files. Design debugged and synthesised with Quartus. Added synthesis script, and included OS-VVM simulation packages. daniel.kho 3894d 00h /axi4_tlm_bfm/trunk/rtl/quartus-synthesis/pkg-axi-tlm.vhdl

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