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URL https://opencores.org/ocsvn/bustap-jtag/bustap-jtag/trunk

Subversion Repositories bustap-jtag

[/] [bustap-jtag/] [tags/] [v2p2/] - Rev 16

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16 Released version 2.2. ash_riple 4425d 20h /bustap-jtag/tags/v2p2/
15 Released version 2.2. ash_riple 4425d 21h /bustap-jtag/trunk/
14 Changed dec to hex value of triggerPnum. ash_riple 4426d 11h /bustap-jtag/trunk/
13 Added minor syntax changes and Linux environment simulation script. ash_riple 4426d 17h /bustap-jtag/trunk/
12 Added timing information to the capture content. ash_riple 4427d 00h /bustap-jtag/trunk/
11 Added pre-trigger capture. ash_riple 4427d 16h /bustap-jtag/trunk/
10 Changed the location/reference/generation of compiler directive file: jtag_sim_define.h, to have better code structure. ash_riple 4432d 21h /bustap-jtag/trunk/
9 Added testbench with interactive GUI. Start it from "sim.bat" or "do sim.do".
Virtual JTAG stimulus can only be entered statically before simulation starts.
FIFO operation can be simulated dynamically while simulation is run.		 ash_riple 4433d 16h /bustap-jtag/trunk/
8 Added fault handling of wrong input length in the GUI. ash_riple 4437d 16h /bustap-jtag/trunk/
7 Added references related to "Bus Monitor". ash_riple 4437d 20h /bustap-jtag/trunk/
6 Updated to 2.1. New features added as in doc/Revision History.txt. ash_riple 4438d 16h /bustap-jtag/trunk/
5 Created code base for 2.x development.
Now supporting pipelined read/write access. Provided wrapper can be used as an example to connect up_monitor to any bus.		 ash_riple 4441d 17h /bustap-jtag/trunk/
3 Added original article. ash_riple 4441d 20h /bustap-jtag/trunk/
2 Checked in working code base. ash_riple 4445d 16h /bustap-jtag/trunk/
1 The project and the structure was created root 4446d 06h /bustap-jtag/trunk/

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