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[/] [c16/] [tags/] [Rev_XLNX_5/] - Rev 26

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26 New directory structure. root 5552d 01h /c16/tags/Rev_XLNX_5/
20 This commit was manufactured by cvs2svn to create tag 'Rev_XLNX_5'. 7107d 07h /tags/Rev_XLNX_5/
19 FPGA Pin desription added. jsauermann 7107d 07h /trunk/
18 Assert ENABLE_INT and DISABLE_INT only in M1.
Thanks to Riccardo Cerulli-Irelly.
Requires a fix in rtos.c as well
jsauermann 7408d 06h /trunk/
17 Assert ENABLE_INT and DISABLE_INT only in M1.
Thanks to Riccardo Cerulli-Irelly.
Requires a fix in rtos.c as well
jsauermann 7408d 07h /trunk/
16 Enable interrupts at start of each task.
This fix is required after a change in opcode_decoder.vhd.
jsauermann 7408d 07h /trunk/
15 sample ucf file jsauermann 7447d 10h /trunk/
14 no message jsauermann 7455d 11h /trunk/
13 bug in print_unsigned() fixed.
Now done as in rtos.c
jsauermann 7498d 04h /trunk/
12 Todo removed jsauermann 7527d 02h /trunk/
11 First Version jsauermann 7527d 02h /trunk/
10 Set top of stack of idle task to end of internal memory rather
than end of external memory (causing incorrect display of
100 % CPU load).
jsauermann 7527d 04h /trunk/
9 Made cpu_engine WISHBONE compliant.
(Somebody please validate it).
jsauermann 7527d 04h /trunk/
8 Initialization of compound auto variables added (was TODO) jsauermann 7534d 07h /trunk/
7 Handle auto variable declarations in compound statements properly jsauermann 7535d 06h /trunk/
6 New Target polled for testing compiler without the need to simulate interrupts jsauermann 7535d 06h /trunk/
5 Initial version jsauermann 7536d 03h /trunk/
4 Documentation finalized jsauermann 7536d 07h /trunk/
2 no message jsauermann 7539d 03h /trunk/
1 Standard project directories initialized by cvs2svn. 7539d 03h /trunk/

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