OpenCores
URL https://opencores.org/ocsvn/i2s_interface/i2s_interface/trunk

Subversion Repositories i2s_interface

[/] - Rev 29

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
29 Bugfixes gedra 2840d 11h /
28 Added old uploaded documents to new repository. root 5539d 12h /
27 Added old uploaded documents to new repository. root 5540d 03h /
26 New directory structure. root 5540d 03h /
25 Code beutification. gedra 6057d 05h /
24 Code beutification. gedra 6057d 05h /
23 BugFix: LSB of transmitted word would be set to zero in slave master mode. (Credit: Julien Dumont) gedra 6915d 08h /
22 Bugfix of register read/write strobes gedra 7052d 08h /
21 Fixed equations for RATIO bits in configuration register. gedra 7052d 08h /
20 Fixed equations for RATIO bits in configuration register. gedra 7052d 08h /
19 De-linted. gedra 7215d 13h /
18 De-linting. gedra 7216d 06h /
17 Removed conf_inten, and fixed bug in transmitter master mode. gedra 7216d 06h /
16 Top level test bench. gedra 7218d 11h /
15 Transmitter top level, slave mode. gedra 7218d 11h /
14 Transmitter top level, master mode. gedra 7218d 11h /
13 Receiver top level, slave mode. gedra 7218d 11h /
12 Receiver top level, master mode. gedra 7218d 11h /
11 Transmitter component declarations. gedra 7218d 11h /
10 Receiver component declarations. gedra 7218d 11h /
9 Transmitter Wishbone cycle decoder. gedra 7219d 06h /
8 Receiver Wishbone cycle decoder. gedra 7219d 06h /
7 I2S encoder/decoder. gedra 7219d 06h /
6 Version register. gedra 7219d 06h /
5 Reuse notice. gedra 7219d 07h /
4 Wishbone test bench notice. gedra 7219d 07h /
3 I2S interface specification. gedra 7219d 07h /
2 GPL License gedra 7219d 07h /
1 Standard project directories initialized by cvs2svn. 7219d 07h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.