URL https://opencores.org/ocsvn/next186_soc_pc/next186_soc_pc/trunk

Subversion Repositories next186_soc_pc

[/] - Rev 15

Rev	Log message	Author	Age	Path
15		ndumitrache	1916d 05h	/
14	Ported on Chameleon V2 board: Cyclone10LP-8, 32MB SDRAM at 185Mhz, 100Mhz bus, 50Mhz CPU, 90Mhz DSP, 8KB cache.	ndumitrache	1916d 05h	/
13		ndumitrache	1916d 05h	/
12		ndumitrache	2256d 06h	/
11		ndumitrache	2306d 11h	/
10	Adlib/OPL3 for Nexys4 board	ndumitrache	2592d 09h	/
9		ndumitrache	2653d 04h	/
8	Lattice Mach XO2 + SDRAM port (FleaFPGA)	ndumitrache	3658d 06h	/
7	Disable interrupts in VESAMemControl callback	ndumitrache	3782d 04h	/
6		ndumitrache	3961d 11h	/
5	updated Next186 CPU	ndumitrache	3961d 11h	/
4	fix BIOS int 1ah (Get system time)	ndumitrache	3992d 11h	/
3		ndumitrache	3995d 12h	/
2		ndumitrache	3995d 12h	/
1	The project and the structure was created	root	3996d 05h	/