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[/] [oms8051mini/] [trunk/] [verif/] - Rev 31

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Rev Log message Author Age Path
31 I2C Master Test cases are added dinesha 2689d 04h /oms8051mini/trunk/verif/
30 irun update dinesha 2689d 07h /oms8051mini/trunk/verif/
29 i2c master test cased added dinesha 2689d 08h /oms8051mini/trunk/verif/
27 I2C master is integrated dinesha 2690d 06h /oms8051mini/trunk/verif/
25 8051 core reset active edge changed from high to low dinesha 2691d 09h /oms8051mini/trunk/verif/
24 All Instruction C code added dinesha 2693d 03h /oms8051mini/trunk/verif/
23 c code removed dinesha 2693d 03h /oms8051mini/trunk/verif/
22 New C Model added dinesha 2693d 03h /oms8051mini/trunk/verif/
21 New test case dinesha 2693d 06h /oms8051mini/trunk/verif/
19 Uart Message Handler added as register master dinesha 2706d 08h /oms8051mini/trunk/verif/
16 .dat file is removed from svn dinesha 2714d 13h /oms8051mini/trunk/verif/
15 Clean up dinesha 2714d 13h /oms8051mini/trunk/verif/
14 Tb Clean up dinesha 2715d 05h /oms8051mini/trunk/verif/
11 changed 32 bit to 8 bit register interface dinesha 2718d 05h /oms8051mini/trunk/verif/
10 EXTERNAL ROM option is removed dinesha 2719d 14h /oms8051mini/trunk/verif/
9 Modelsim golden log file dinesha 2729d 06h /oms8051mini/trunk/verif/
8 irun update for cadence flow dinesha 2729d 06h /oms8051mini/trunk/verif/
7 Uart test case cleanup dinesha 2729d 06h /oms8051mini/trunk/verif/
6 Uart Message Handler added into SVN and Uart fixs dinesha 2729d 09h /oms8051mini/trunk/verif/
5 Irun Rename dinesha 2730d 06h /oms8051mini/trunk/verif/
4 Irun update dinesha 2730d 06h /oms8051mini/trunk/verif/
3 GMAC related test cases are removed dinesha 2731d 06h /oms8051mini/trunk/verif/
2 Initial version;
1. Ported from turbo8051 core data base
1. Removed the GMAC related logic and verif componets		 dinesha 2731d 06h /oms8051mini/trunk/verif/

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