URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [verif/] [run/] - Rev 31

Rev	Log message	Author	Age	Path
31	I2C Master Test cases are added	dinesha	2689d 04h	/oms8051mini/trunk/verif/run/
30	irun update	dinesha	2689d 07h	/oms8051mini/trunk/verif/run/
29	i2c master test cased added	dinesha	2689d 08h	/oms8051mini/trunk/verif/run/
27	I2C master is integrated	dinesha	2690d 06h	/oms8051mini/trunk/verif/run/
25	8051 core reset active edge changed from high to low	dinesha	2691d 09h	/oms8051mini/trunk/verif/run/
22	New C Model added	dinesha	2693d 03h	/oms8051mini/trunk/verif/run/
19	Uart Message Handler added as register master	dinesha	2706d 08h	/oms8051mini/trunk/verif/run/
16	.dat file is removed from svn	dinesha	2714d 13h	/oms8051mini/trunk/verif/run/
15	Clean up	dinesha	2714d 13h	/oms8051mini/trunk/verif/run/
14	Tb Clean up	dinesha	2715d 05h	/oms8051mini/trunk/verif/run/
11	changed 32 bit to 8 bit register interface	dinesha	2718d 05h	/oms8051mini/trunk/verif/run/
10	EXTERNAL ROM option is removed	dinesha	2719d 14h	/oms8051mini/trunk/verif/run/
8	irun update for cadence flow	dinesha	2729d 06h	/oms8051mini/trunk/verif/run/
7	Uart test case cleanup	dinesha	2729d 06h	/oms8051mini/trunk/verif/run/
5	Irun Rename	dinesha	2730d 06h	/oms8051mini/trunk/verif/run/
4	Irun update	dinesha	2730d 06h	/oms8051mini/trunk/verif/run/
2	Initial version; 1. Ported from turbo8051 core data base 1. Removed the GMAC related logic and verif componets	dinesha	2731d 06h	/oms8051mini/trunk/verif/run/