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[/] [openarty/] [trunk/] [rtl/] [wbicapetwo.v] - Rev 30

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30 Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz.
dgisselq 2754d 06h /openarty/trunk/rtl/wbicapetwo.v
25 The memory now works. However, the core speed has been lowered to 81.25MHz
to do this. The top level file is no longer fasttop.v, but toplevel.v.
dgisselq 2790d 11h /openarty/trunk/rtl/wbicapetwo.v
13 Here are the updates necessary to get the initial Quad SPI flash driver working.
This includes in particular the bus interconnect (in fastmaster.v), and the
final hookup to the external wires (in fasttop.v).
dgisselq 2821d 07h /openarty/trunk/rtl/wbicapetwo.v
3 Initial set of files. The flash appears to work, memory hasn't been started,
the MDIO controller works in simulation, etc. Everything below fasttop.v works
at 200MHz (not the CPU---yet).
dgisselq 2837d 13h /openarty/trunk/rtl/wbicapetwo.v

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