URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src-c/] [sandbox/] [makefile] - Rev 200

Rev	Log message	Author	Age	Path
200	Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains.	olivier.girard	3404d 20h	/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
141	Update verification environment to support MSPGCC Uniarch (based on GCC 4.5 and later)	olivier.girard	4395d 21h	/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
134	Add full ASIC support (low-power modes, DFT, ...). Improved serial debug interface reliability.	olivier.girard	4439d 22h	/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
111	Re-organized the "openMSP430_defines.v" file. Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning). Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000). As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.	olivier.girard	4746d 22h	/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
76	Add possibility to simulate C code within the "core" environment.	olivier.girard	4929d 21h	/openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile