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Rev Log message Author Age Path
228 Update Changelog. olivier.girard 2234d 00h /
227 Fix Software development tools issue preventing COM port connections on Windows 10. olivier.girard 2234d 00h /
226 Fix documentation typo with 'BCSCTLx/DCOCTL' names and addresses. olivier.girard 2386d 22h /
225 Fix documentation typo regarding the 'per_we' port name. olivier.girard 2386d 23h /
224 Update typo in the instruction length table documentation. olivier.girard 2722d 22h /
223 Adjust register mapping of FRAME_SELECT olivier.girard 2754d 22h /
222 Update to latest openGFX430 version. Update 2BPP demo. olivier.girard 2755d 23h /
221 Move old Altera-DE1 project to the OBSOLETE directory.
Create new Altera-DE0-Nano-SoC project, also containing a small demo of the openGFX430 graphic controller.		 olivier.girard 2832d 23h /
220 Create OBSOLETE directory to store old FPGA projects olivier.girard 2833d 00h /
219 Update overview html file olivier.girard 2849d 00h /
218 Update Tools Changelog olivier.girard 2849d 00h /
217 Update openmsp430-gdb-proxy tool to fix Get Register procedure when using the TI GDB (thanks to Simon Fröhlich for this one). olivier.girard 2849d 00h /
216 Add new donate picture. olivier.girard 2849d 00h /
215 Update ChangeLog olivier.girard 2991d 01h /
214 Fix multiwindow environment issue & close window with 'X'. Thanks to Fabian Mauroner for this one olivier.girard 2991d 01h /
213 Update ChangeLogs olivier.girard 3107d 10h /
212 Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains. olivier.girard 3107d 10h /
211 Add custom printf function to reduce program memory footprint (the TI/RH GCC version is huge). Note that this function was created by DJ Delorie ( http://www.delorie.com/ ) olivier.girard 3107d 10h /
210 Add support for both MSPGCC and TI/RH-GCC toolchains. Add detection of debug ports for OS-X. olivier.girard 3107d 11h /
209 Update ChangeLogs olivier.girard 3135d 00h /
208 Update tools to run with latest CPU core version. olivier.girard 3135d 00h /
207 Simulation now works seamlessly under Linux, OS-X and Windows (Cygwin) olivier.girard 3135d 00h /
206 Update ChangeLog olivier.girard 3232d 00h /
205 Thanks again to Johan W. good feedback, the following updates are implemented:
- Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment.
- Update oscillators enable generation to relax a critical timing paths in the ASIC version.
- Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).		 olivier.girard 3232d 00h /
204 Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that). olivier.girard 3239d 00h /
203 Update ChangeLog olivier.girard 3246d 00h /
202 Add DMA interface support + LINT cleanup olivier.girard 3246d 00h /
201 Update ChangeLog olivier.girard 3406d 23h /
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 3406d 23h /
199 Update ChangeLog olivier.girard 3513d 01h /

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