OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [branches/] [or1200_rel3/] - Rev 795

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
795 Created or1200_rel3 branch from rev 794 olof 4393d 20h /openrisc/branches/or1200_rel3/
794 ORPSoC, or1200: split out or1200_fpu_intfloat_conv_except module into own file

Fixes lint warnings.		 julius 4399d 06h /openrisc/trunk/or1200/
788 or1200: Patch from R Diez to remove l.cust5 signal from a sensitivty list when it's not defined.

Signed-off-by: R Diez <rdiezmail-openrisc@yahoo.de>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 julius 4423d 20h /openrisc/trunk/or1200/
679 Allow setting the boot address as an external
parameter. If no parameter is used, the value
from OR1200_BOOT_ADR will be used

Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>		 olof 4447d 20h /openrisc/trunk/or1200/
674 or1200: Fix for Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled julius 4490d 05h /openrisc/trunk/or1200/
647 or1200: update documentation to go with recent rtl commits julius 4610d 19h /openrisc/trunk/or1200/
645 or1200: Specification document source now in asciidoc format. ODT and MS Word format documents deprecated, PDF regenerated julius 4628d 18h /openrisc/trunk/or1200/
644 or1200: the infamous l.rfe fix, and bug fix for when multiply is disabled julius 4628d 19h /openrisc/trunk/or1200/
643 or1200: new ALU comparision implementation option, TLB invalidate register indicated as not present, multiply overflow detection bug fix julius 4628d 19h /openrisc/trunk/or1200/
642 or1200: add carry, overflow bits, and range exception julius 4628d 19h /openrisc/trunk/or1200/
641 or1200: fix serial multiply/divide bug julius 4628d 19h /openrisc/trunk/or1200/
640 or1200: add l.ext instructions, fix a MAC bug julius 4628d 19h /openrisc/trunk/or1200/
639 or1200: or1200_dpram.v change task set_gpr to function julius 4628d 20h /openrisc/trunk/or1200/
481 OR1200 Update. RTL and spec. julius 4854d 11h /openrisc/trunk/or1200/
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.		 julius 4910d 22h /openrisc/trunk/or1200/
401 Fixing find first one (ff1) and find last one (fl1) support in OR1200.

Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table.		 julius 4933d 00h /openrisc/trunk/or1200/
364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.		 julius 4982d 20h /openrisc/trunk/or1200/
359 Removing duplicate OR1200 spec from docs/ path, original in or1200/doc should be used instead, also moving Japanese OR1200 spec to or1200/doc julius 4985d 03h /openrisc/trunk/or1200/
358 OR1200's reset now configurable as active high or active low. Thanks to patch
from OpenCores contributor Kuoping.

Updated OR1200 in ORPSoCv2 and OR1200 project.		 julius 4985d 05h /openrisc/trunk/or1200/
356 Added new simple MAC test to ORPSoC test suite:
* orpsocv2/sw/or1200asm/or1200asm-mac.S: Added

Fixed MAC pipeline issue in OR1200
* or1200/rtl/verilog/or1200_mult_mac.v: Made mac_op valid only once per insn.
* orpsocv2/rtl/verilog/components/or1200/or1200_mult_mac.v: ""

* orpsocv2/sw/dhry/dhry.c: Changed final output to be same as ORPmon version
* orpsocv2/sim/bin/Makefile: Added new MAC test to default tests		 julius 4985d 14h /openrisc/trunk/or1200/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.