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[/] [openrisc/] [trunk/] [or1200/] [doc/] [openrisc1200_spec.pdf] - Rev 809

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809 OR1200: Regenerate documentation.

Forgot newline in version history table, so last entry was missing.		 julius 4378d 05h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
808 OR1200: Add DSX bit support to SR.

Updated documentation, revision is now 13.

http://bugzilla.opencores.org/bugzilla4/show_bug.cgi?id=85		 julius 4378d 05h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
647 or1200: update documentation to go with recent rtl commits julius 4628d 10h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
645 or1200: Specification document source now in asciidoc format. ODT and MS Word format documents deprecated, PDF regenerated julius 4646d 09h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
481 OR1200 Update. RTL and spec. julius 4872d 02h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
401 Fixing find first one (ff1) and find last one (fl1) support in OR1200.

Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table.		 julius 4950d 14h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.		 julius 5000d 11h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5013d 05h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
10 or1200 added from or1k subversion repository unneback 5475d 21h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf

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