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[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] [mc.c] - Rev 385

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385 Updates for Or1ksim 0.5.0rc2.

* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.

* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected.		 jeremybennett 4977d 12h /openrisc/trunk/or1ksim/peripheral/mc.c
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5041d 16h /openrisc/trunk/or1ksim/peripheral/mc.c
104 Candidate release 0.4.0rc4 jeremybennett 5098d 16h /openrisc/trunk/or1ksim/peripheral/mc.c
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5113d 11h /openrisc/trunk/or1ksim/peripheral/mc.c
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5142d 08h /openrisc/trunk/or1ksim/peripheral/mc.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5472d 17h /openrisc/trunk/or1ksim/peripheral/mc.c

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