OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [uart/] [sim/] [uart-interrupt.c] - Rev 431

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
431 Updated and move OR1200 supplementary manual.

or_debug_proxy GDB RSP interface fix.

ORPSoC S/W and makefile updates.
julius 4927d 04h /openrisc/trunk/orpsocv2/sw/tests/uart/sim/uart-interrupt.c
397 ORPSoCv2:

doc/ path added, with Texinfo documentation. Still a work in progress.

VPI files updated.

OR1200 l.maci instruction test added. highlighting bug with immediate field for that instruction.

Various cycle accurate model updates. Now uses orpsoc-defines.v (processed C-compat. version) to build.
julius 4951d 07h /openrisc/trunk/orpsocv2/sw/tests/uart/sim/uart-interrupt.c
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 4954d 06h /openrisc/trunk/orpsocv2/sw/tests/uart/sim/uart-interrupt.c
349 ORPSoCv2 update with new software and makefile update julius 5004d 07h /uart-interrupt.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.