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[/] - Rev 33

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Rev Log message Author Age Path
13 Add document and synthesis directories homer.xing 4489d 22h /
12 Simplify the interface of the core. homer.xing 4489d 23h /
11 Cheers! as fast as a rocket homer.xing 4490d 19h /
10 Ho ho, better circuit homer.xing 4491d 13h /
9 Add constrains file for ISE homer.xing 4492d 16h /
8 Finished Tate Pairing. Ha ha ha homer.xing 4492d 17h /
7 Finish inversion @ f33m homer.xing 4500d 22h /
6 add testbench for $f33m$. homer.xing 4501d 22h /
5 rename director : verilog/ -> rtl/ homer.xing 4501d 22h /
4 add testbench homer.xing 4502d 20h /

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