URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] [pcie_ds_dma/] [trunk/] [core/] - Rev 44

Rev	Log message	Author	Age	Path
42	add coregen_s6 - components for Spartan 6	dsmv	3936d 19h	/pcie_ds_dma/trunk/core/
40	set wb_clk to 32 MHz	dsmv	3942d 18h	/pcie_ds_dma/trunk/core/
38	sp605_lx45t_wishbone - correct reset, block_test_check, block_test_generate	dsmv	3949d 17h	/pcie_ds_dma/trunk/core/
32	Set 125 MHz for wishbone bus. Data transfered from TEST_GEN to computer without errors.	dsmv	3974d 16h	/pcie_ds_dma/trunk/core/
29	Correct dmar, rst for wb_test; Add STATUS register.	dsmv	3981d 20h	/pcie_ds_dma/trunk/core/
22	correct wishbone_test_en.htm	dsmv	4023d 21h	/pcie_ds_dma/trunk/core/
18	read block_id - ok	dsmv	4024d 14h	/pcie_ds_dma/trunk/core/
17	ambpex5_sx50t_wishbone - simulation is ok	dsmv	4045d 17h	/pcie_ds_dma/trunk/core/
13	correct wishbone_test_en.htm	dsmv	4051d 19h	/pcie_ds_dma/trunk/core/
12	Add description of project wishbone	dsmv	4051d 19h	/pcie_ds_dma/trunk/core/
11	fixed cpl_byte_count in core64_tx_engine_m4.vhd	dsmv	4053d 22h	/pcie_ds_dma/trunk/core/
2	add files from project DS_DMA on ds-dev.ru	dsmv	4298d 03h	/pcie_ds_dma/trunk/core/