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[/] [plasma/] [trunk/] [vhdl/] - Rev 433

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Rev Log message Author Age Path
429 Changed INIT bit length in RAM16X1D and RAM32X1D rhoads 3968d 05h /plasma/trunk/vhdl/
428 Fix mult bugs "0*-1" and "-5%12". rhoads 3983d 10h /plasma/trunk/vhdl/
404 Changed spacing rhoads 4721d 01h /plasma/trunk/vhdl/
403 Disable Ethernet and cache when simulating. rhoads 4721d 01h /plasma/trunk/vhdl/
397 Added RAM32X1D option rhoads 4854d 19h /plasma/trunk/vhdl/
391 Better fix for 0x8000000 * negative number rhoads 5007d 01h /plasma/trunk/vhdl/
390 Handle special case of signed mult of 0x80000000 and a negative number rhoads 5010d 00h /plasma/trunk/vhdl/
383 Permit up to 64KB internal RAM and updated cache code. rhoads 5017d 01h /plasma/trunk/vhdl/
377 Fix cache_we warning rhoads 5160d 07h /plasma/trunk/vhdl/
376 Add write_enable to sensitivity list for Altera rhoads 5160d 08h /plasma/trunk/vhdl/
374 Fixed comment rhoads 5205d 21h /plasma/trunk/vhdl/
371 rhoads 5355d 10h /plasma/trunk/vhdl/
370 Fix "SLTIU v0, a0, -4000" by making imm signed rhoads 5355d 11h /plasma/trunk/vhdl/
369 Simplify E_RX_CLK usage rhoads 5360d 22h /plasma/trunk/vhdl/
365 Added UNISIM comment rhoads 5418d 23h /plasma/trunk/vhdl/
356 Added space to align text rhoads 5470d 22h /plasma/trunk/vhdl/
352 linus 5519d 15h /plasma/trunk/vhdl/
350 root 5548d 10h /plasma/trunk/vhdl/
348 Added comment for 32MB and 128MB DDR parts rhoads 5579d 06h /plasma/trunk/vhdl/
347 Xilinx ISE Project file rhoads 5579d 06h /plasma/trunk/vhdl/

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