URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio/] - Rev 35

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Rev	Log message	Author	Age	Path
35	Temporary checkin of new synchronous RioSerial. Does not work yet. Temporary checkin of RioLogicalCommon. Does not work yet.	magro732	3538d 06h	/rio/
34	Adding first version of logical egress.	magro732	3542d 01h	/rio/
33	Adding common logical layer module.	magro732	3543d 06h	/rio/
32	branches/singleSymbol Adding a wait-state to only insert one control-symbol into an outbound packet.	magro732	3546d 09h	/rio/
31	Fixing compiler errors. Adding support for inserting control-symbols from receiver into frames.	magro732	3548d 10h	/rio/
30	Changing name tags/1.0.1 to tags/1.0.1-release.	magro732	3548d 12h	/rio/
29	Fixed bug in RioSwitch internal Wishbone interconnects.	magro732	3548d 13h	/rio/
28	Correcting bug in RioSwitch.vhd internal Wishbone interconnect. Modifying an existing test case in TestRioSwitch.vhd to provoke the error.	magro732	3548d 13h	/rio/
27	Adding missing code to single-symbol pipelined transmitter. Not tested nor copiled.	magro732	3550d 00h	/rio/
26	Temporary checkin of parallelSymbols branch. It does not work yet.	magro732	3710d 12h	/rio/
25	Correcting compiler errors in TestRioPcsUart.vhd	magro732	3717d 06h	/rio/
24	Changing errornous use statement.	magro732	3717d 06h	/rio/
23	Tagging alpha release 2.0.0.	magro732	3834d 00h	/rio/
22	Tagging release 1.0.0.	magro732	3834d 00h	/rio/
21	Branching of a single symbol version of the new RioSerial.	magro732	3834d 00h	/rio/
20	Adding software C-stack and matching VHDL modules.	magro732	3899d 02h	/rio/
19	Removing synthesis warnings.	magro732	3924d 02h	/rio/
18	Making RioSerial entity the same as before+minor fixes.	magro732	3925d 00h	/rio/
17	Removing latch and improving timing.	magro732	3926d 01h	/rio/
16	Removed FIFO between RioSerial and PCS. Transmitter works without idle ticks. Internal symbol fifo increased. Changed readContentEnd_o timing.	magro732	3926d 01h	/rio/

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Subversion Repositories rio

[/] [rio/] - Rev 35

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