OpenCores
URL https://opencores.org/ocsvn/spi/spi/trunk

Subversion Repositories spi

[/] [spi/] [trunk/] [rtl/] - Rev 29

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
27 New directory structure. root 5550d 01h /spi/trunk/rtl/
25 CTRL register bit fields changed, VATS testing support added. simons 7370d 17h /trunk/rtl/
21 Byte selects changed. simons 7621d 19h /trunk/rtl/
19 Errors fixed. simons 7622d 23h /trunk/rtl/
17 Define mess fixed. simons 7625d 20h /trunk/rtl/
15 Defines set in order. simons 7626d 00h /trunk/rtl/
13 8-bit WB access enabled. simons 7626d 17h /trunk/rtl/
10 Slave select signal generation bug fixed, default case added when reading registers, to avoid latches. simons 7665d 00h /trunk/rtl/
9 Support for 128 bits character length added. Zero value divider bug fixed. simons 7705d 17h /trunk/rtl/
8 Automatic slave select signal generation added. simons 7725d 19h /trunk/rtl/
7 Support for 64 bit caharacter len added. simons 7814d 07h /trunk/rtl/
2 Initial import simons 8012d 19h /trunk/rtl/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.