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26 This commit was manufactured by cvs2svn to create tag 'rel_8'. 7368d 07h /
25 CTRL register bit fields changed, VATS testing support added. simons 7368d 07h /
24 This commit was manufactured by cvs2svn to create tag 'rel_7'. 7619d 10h /
23 This commit was manufactured by cvs2svn to create tag 'asyst_3'. 7619d 10h /
22 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7619d 10h /
21 Byte selects changed. simons 7619d 10h /
20 This commit was manufactured by cvs2svn to create tag 'rel_6'. 7620d 14h /
19 Errors fixed. simons 7620d 14h /
18 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7623d 11h /
17 Define mess fixed. simons 7623d 11h /
16 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7623d 14h /
15 Defines set in order. simons 7623d 14h /
14 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7624d 08h /
13 8-bit WB access enabled. simons 7624d 08h /
12 Error fixed. simons 7644d 15h /
11 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7662d 14h /
10 Slave select signal generation bug fixed, default case added when reading registers, to avoid latches. simons 7662d 14h /
9 Support for 128 bits character length added. Zero value divider bug fixed. simons 7703d 08h /
8 Automatic slave select signal generation added. simons 7723d 09h /
7 Support for 64 bit caharacter len added. simons 7811d 22h /

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