URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] - Rev 332

Rev	Log message	Author	Age	Path
332	mcs2x tests	arniml	503d 17h	/t48/
331	release 1.3	arniml	503d 23h	/t48/
330	add t8021	arniml	503d 23h	/t48/
329	start work on t2x	arniml	504d 16h	/t48/
328	prepare 1.3	arniml	506d 18h	/t48/
327	update integration manual	arniml	507d 16h	/t48/
326	refine status_q update	arniml	507d 20h	/t48/
325	experimental upi41_db_bus variant with asynchronous master interface	arniml	508d 03h	/t48/
324	enhance access timing in test bench	arniml	508d 03h	/t48/
323	- prevent change when master reads status - relax master access timing	arniml	509d 02h	/t48/
322	hold db_dir_o during entire access	arniml	510d 18h	/t48/
321	improve compatibility with modelsim and ghdl	arniml	511d 15h	/t48/
320	improve in test	arniml	511d 15h	/t48/
319	- add dma test - update dma logic	arniml	513d 18h	/t48/
318	t8042ah synth, fix warnings	arniml	513d 22h	/t48/
317	implement dma logic	arniml	513d 23h	/t48/
316	doc	arniml	514d 03h	/t48/
315	fix upi master interrupt enables, rectify p2 tests	arniml	515d 00h	/t48/
314	upi: remove include generics	arniml	515d 03h	/t48/
313	- implement flags/master interrupt - add related test	arniml	515d 18h	/t48/