OpenCores
URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] - Rev 338

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
338 sample int with rising ALE arniml 502d 06h /t48/
337 t8022 synthesis arniml 502d 07h /t48/
336 docs arniml 502d 09h /t48/
335 simplify up41 test setup arniml 502d 11h /t48/
334 fix timing of sel_an*, rad arniml 502d 23h /t48/
333 add t8022 arniml 503d 04h /t48/
332 mcs2x tests arniml 504d 01h /t48/
331 release 1.3 arniml 504d 07h /t48/
330 add t8021 arniml 504d 07h /t48/
329 start work on t2x arniml 505d 00h /t48/
328 prepare 1.3 arniml 507d 02h /t48/
327 update integration manual arniml 508d 00h /t48/
326 refine status_q update arniml 508d 04h /t48/
325 experimental upi41_db_bus variant with asynchronous master interface arniml 508d 11h /t48/
324 enhance access timing in test bench arniml 508d 11h /t48/
323 - prevent change when master reads status
- relax master access timing		 arniml 509d 10h /t48/
322 hold db_dir_o during entire access arniml 511d 02h /t48/
321 improve compatibility with modelsim and ghdl arniml 511d 23h /t48/
320 improve in test arniml 511d 23h /t48/
319 - add dma test
- update dma logic		 arniml 514d 02h /t48/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.