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[/] [virtex7_pcie_dma/] - Rev 31

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Rev Log message Author Age Path
31 Added example application documentation. oussamak 3033d 07h /virtex7_pcie_dma/
30 Added:
* Wupper GUI with speed test and chain test
* Added wupper-dma-transfer, wupper-chaintest and wupper-write
* Several bug fixes in the Wupper tools		 oussamak 3033d 08h /virtex7_pcie_dma/
29 Improved application to reflect both up and down transfers fransschreuder 3075d 06h /virtex7_pcie_dma/
28 Added registermap reset fransschreuder 3075d 08h /virtex7_pcie_dma/
27 Fixed:
* BUG 2580: Missing packets in receive (PC => FPGA) path

Changed:
* Client tags now handled by Xilinx IP core
* fifo signals to reflect upfifo and downfifo naming		 fransschreuder 3075d 11h /virtex7_pcie_dma/
26 Added sys_clk constraint fransschreuder 3075d 13h /virtex7_pcie_dma/
25 Added scripts and constraints for KCU105 fransschreuder 3075d 13h /virtex7_pcie_dma/
24 Added:
* Support for KCU105 board in code
TODO
* Add constraints and build scripts for KCU105		 fransschreuder 3076d 07h /virtex7_pcie_dma/
23 Fixed reset of application registers fransschreuder 3133d 12h /virtex7_pcie_dma/
22 Added dma_soft_reset to trigger register resets fransschreuder 3139d 12h /virtex7_pcie_dma/
21 Fixed BUG http://opencores.org/bug,view,2562 fransschreuder 3148d 09h /virtex7_pcie_dma/
20 Fixed:
* Missing packets if the fifo goes empty during a TLP
* Dynamically change the empty threshold of the main fifo to TLP size		 fransschreuder 3162d 08h /virtex7_pcie_dma/
19 * driver/README updated oussamak 3168d 10h /virtex7_pcie_dma/
18 Changed:
* Added drivers
* Added Wupper tools for debugging
* Added card ID register		 oussamak 3168d 12h /virtex7_pcie_dma/
17 Changed name of toplevel, to make tree consistent oussamak 3182d 14h /virtex7_pcie_dma/
16 MODIFED:
-- top level name to wupper_oc (including scripts)		 aborga 3232d 08h /virtex7_pcie_dma/
15 MODIFIED:
-- Renamed core to Wupper (vhdl files)
-- Changed width of interrupt enable to number_of_interrupts		 fransschreuder 3232d 08h /virtex7_pcie_dma/
14 RENAMED:
-- simulation folder		 aborga 3232d 10h /virtex7_pcie_dma/
13 RENAMED:
-- script		 aborga 3232d 10h /virtex7_pcie_dma/
12 Fixed http://opencores.org/bug,view,2524 fransschreuder 3307d 10h /virtex7_pcie_dma/

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