OpenCores
URL https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk

Subversion Repositories virtex7_pcie_dma

[/] [virtex7_pcie_dma/] - Rev 37

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
37 * Added WupperCodeGen, a tool to generate the registermap vhdl, c++ and latex doc from a single .YAML file
* Fixed bug: crash when polling enable bits while transferring DMA in two directions at the same time
* Code cleanup
* Updated documentation with WupperCodeGen		 fransschreuder 2396d 17h /virtex7_pcie_dma/
36 Updated documentation fransschreuder 2731d 18h /virtex7_pcie_dma/
35 FIXED:
* PCIe lock when reading registers on a high frequency
* Added threshold registers for Prog Full of the FromHost fifo
* Code cleanup		 fransschreuder 2785d 23h /virtex7_pcie_dma/
34 FIXED:
* Wrong TLP length reported on register writes
* Two simultaneous interrupts were not handled
* XADC wizard for ultrascale devices

Added:
* Added voltage (int, aux, bram) readout on XADC wizards		 fransschreuder 2891d 17h /virtex7_pcie_dma/
33 ADDED:
-- supportedtools.tex, again to test the OC repo		 aborga 2936d 16h /virtex7_pcie_dma/
32 MODIFIED:
-- minor things just to test OC svn repo		 aborga 2936d 16h /virtex7_pcie_dma/
31 Added example application documentation. oussamak 3030d 18h /virtex7_pcie_dma/
30 Added:
* Wupper GUI with speed test and chain test
* Added wupper-dma-transfer, wupper-chaintest and wupper-write
* Several bug fixes in the Wupper tools		 oussamak 3030d 19h /virtex7_pcie_dma/
29 Improved application to reflect both up and down transfers fransschreuder 3072d 16h /virtex7_pcie_dma/
28 Added registermap reset fransschreuder 3072d 19h /virtex7_pcie_dma/
27 Fixed:
* BUG 2580: Missing packets in receive (PC => FPGA) path

Changed:
* Client tags now handled by Xilinx IP core
* fifo signals to reflect upfifo and downfifo naming		 fransschreuder 3072d 21h /virtex7_pcie_dma/
26 Added sys_clk constraint fransschreuder 3073d 00h /virtex7_pcie_dma/
25 Added scripts and constraints for KCU105 fransschreuder 3073d 00h /virtex7_pcie_dma/
24 Added:
* Support for KCU105 board in code
TODO
* Add constraints and build scripts for KCU105		 fransschreuder 3073d 18h /virtex7_pcie_dma/
23 Fixed reset of application registers fransschreuder 3130d 23h /virtex7_pcie_dma/
22 Added dma_soft_reset to trigger register resets fransschreuder 3136d 23h /virtex7_pcie_dma/
21 Fixed BUG http://opencores.org/bug,view,2562 fransschreuder 3145d 20h /virtex7_pcie_dma/
20 Fixed:
* Missing packets if the fifo goes empty during a TLP
* Dynamically change the empty threshold of the main fifo to TLP size		 fransschreuder 3159d 19h /virtex7_pcie_dma/
19 * driver/README updated oussamak 3165d 21h /virtex7_pcie_dma/
18 Changed:
* Added drivers
* Added Wupper tools for debugging
* Added card ID register		 oussamak 3165d 22h /virtex7_pcie_dma/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.