OpenCores
URL https://opencores.org/ocsvn/wbscope/wbscope/trunk

Subversion Repositories wbscope

[/] [wbscope/] [trunk/] [rtl/] - Rev 12

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
12 Added a bench testing capability to the scope.

Added the software necessary to the scope for building a VCD trace file.
dgisselq 2607d 21h /wbscope/trunk/rtl/
11 Updated the compressed scope with lessons learned from using it. dgisselq 3058d 00h /wbscope/trunk/rtl/
10 Looks like I missed checking in a change associated with implementing the
memory for this scope in block RAM. This *greatly* reduces resource usage.
dgisselq 3104d 21h /wbscope/trunk/rtl/
9 Updated the scope so that it compiles into block RAM within Xilinx's XST. dgisselq 3143d 23h /wbscope/trunk/rtl/
8 Fixed a minor bug that Vivado found, but one that would've prevented the
compressed scope from working.
dgisselq 3228d 23h /wbscope/trunk/rtl/
6 This update reflects very minor to the scope documentation/spec to make it
more readable.

Also included in this release is an update to the compressed scope. This
update changes the compressed scope from working with absolute addresses to
difference addresses. This latter scope and mode has not been tested (yet),
so I can't vouch for how well it will (or won't) work. It is provided, as
the documentation states, for discussion purposes.
dgisselq 3230d 02h /wbscope/trunk/rtl/
3 Added the compressed wishbone scope for discussion purposes. The design/spec
on this compressed scope is not complete, nor is it clear what would constitute
complete, but it is provided to provoke some discussion.
dgisselq 3253d 00h /wbscope/trunk/rtl/
2 First draft of the documentation, perhaps not complete. However, the scope
is complete and has passed quite a bit of testing.
dgisselq 3253d 00h /wbscope/trunk/rtl/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.