URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] - Rev 24

Rev	Log message	Author	Age	Path
24	Use FIFO's for statistics clock domain crossing	antanguay	4202d 18h	/
23	Adding basic packet stats	antanguay	4203d 00h	/
22	Added prototype system verilog testbench	antanguay	4204d 20h	/
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4204d 21h	/
20	Updates for Xilinx synthesis	antanguay	4494d 15h	/
19	Updates for 32/64 bit systems	antanguay	4669d 16h	/
18	Updates for linux 32-bit	antanguay	4670d 13h	/
17	Fixed deprecated SystemC warnings	antanguay	4672d 21h	/
16	Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim	antanguay	4673d 03h	/
15	Updated for Verilator 3.813	antanguay	4692d 03h	/
14	Change interface to big endian, added serdes examples to testbench	antanguay	5280d 22h	/
13	Change interface to big endian, added serdes examples to testbench	antanguay	5280d 22h	/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5280d 23h	/
11	Fixed clock crossing	antanguay	5386d 20h	/
10	Added details to spec	antanguay	5484d 15h	/
9	Added old uploaded documents to new repository.	root	5559d 02h	/
8	Added old uploaded documents to new repository.	root	5559d 08h	/
7	New directory structure.	root	5559d 08h	/
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	5835d 16h	/
5	Fixed compilation	antanguay	5841d 16h	/