URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] - Rev 25

Rev	Log message	Author	Age	Path
25	Timing improvements, reduced FIFO size from 1024 to 512	antanguay	4192d 17h	/
24	Use FIFO's for statistics clock domain crossing	antanguay	4192d 19h	/
23	Adding basic packet stats	antanguay	4193d 01h	/
22	Added prototype system verilog testbench	antanguay	4194d 22h	/
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4194d 22h	/
20	Updates for Xilinx synthesis	antanguay	4484d 16h	/
19	Updates for 32/64 bit systems	antanguay	4659d 17h	/
18	Updates for linux 32-bit	antanguay	4660d 14h	/
17	Fixed deprecated SystemC warnings	antanguay	4662d 22h	/
16	Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim	antanguay	4663d 04h	/
15	Updated for Verilator 3.813	antanguay	4682d 05h	/
14	Change interface to big endian, added serdes examples to testbench	antanguay	5270d 23h	/
13	Change interface to big endian, added serdes examples to testbench	antanguay	5271d 00h	/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5271d 00h	/
11	Fixed clock crossing	antanguay	5376d 21h	/
10	Added details to spec	antanguay	5474d 16h	/
9	Added old uploaded documents to new repository.	root	5549d 04h	/
8	Added old uploaded documents to new repository.	root	5549d 09h	/
7	New directory structure.	root	5549d 09h	/
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	5825d 17h	/