OpenCores
URL https://opencores.org/ocsvn/uart16550/uart16550/trunk

Subversion Repositories uart16550

[/] - Rev 45

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 45, 2001-11-26 21:38:54 GMT
  • Author: gorban
  • Log message:
    Lots of fixes:
    Break condition wasn't handled correctly at all.
    LSR bits could lose their values.
    LSR value after reset was wrong.
    Timing of THRE interrupt signal corrected.
    LSR bit 0 timing corrected.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.