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[/] [s1_core/] [trunk/] [hdl/] [rtl/] [s1_top/] - Rev 44

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Last modification

  • Rev 44, 2007-04-10 01:46:30 GMT
  • Author: fafa1971
  • Log message:
    Embedded `defines into Verilog source since did not find command line option for XST

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