OpenCores
URL https://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk

Subversion Repositories adv_debug_sys

[/] - Rev 14

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 14, 2009-06-17 01:30:00 GMT
  • Author: nyawn
  • Log message:
    Added support for the legacy hardware debug unit (debug_if) to adv_jtag_bridge. Re-factored adv_jtag_bridge, removed many compilation warnings. Renamed some signals in the TAP cores for clarity. Updated documents.
Path
/adv_debug_sys/trunk/Doc/or1k_debug_sys_manual.pdf
/adv_debug_sys/trunk/Doc/src/or1k_debug_sys_manual.odt
/adv_debug_sys/trunk/Hardware/adv_dbg_if/doc/AdvancedDebugInterface.pdf
/adv_debug_sys/trunk/Hardware/adv_dbg_if/doc/src/AdvancedDebugInterface.odt
/adv_debug_sys/trunk/Hardware/altera_virtual_jtag/doc/altera_virtual_jtag.pdf
/adv_debug_sys/trunk/Hardware/altera_virtual_jtag/doc/src/altera_virtual_jtag.odt
/adv_debug_sys/trunk/Hardware/altera_virtual_jtag/rtl/vhdl/altera_virtual_jtag.vhd
/adv_debug_sys/trunk/Hardware/jtag/tap/doc/jtag.pdf
/adv_debug_sys/trunk/Hardware/jtag/tap/doc/src/jtag.odt
/adv_debug_sys/trunk/Hardware/jtag/tap/rtl/verilog/tap_top.v
/adv_debug_sys/trunk/Hardware/xilinx_internal_jtag/doc/src/xilinx_internal_jtag.odt
/adv_debug_sys/trunk/Hardware/xilinx_internal_jtag/doc/xilinx_internal_jtag.pdf
/adv_debug_sys/trunk/Hardware/xilinx_internal_jtag/rtl/verilog/xilinx_internal_jtag.v
/adv_debug_sys/trunk/Software/adv_jtag_bridge/adv_dbg_commands.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/adv_dbg_commands.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/adv_debug_module.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/adv_jtag_bridge.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/bsdl_parse.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/cable_common.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/cable_common.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/cable_parallel.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/cable_usbblaster.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/cable_xpc_dlc9.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/chain_commands.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/chain_commands.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/dbg_api.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/dbg_api.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/doc/adv_jtag_bridge.pdf
/adv_debug_sys/trunk/Software/adv_jtag_bridge/doc/src/adv_jtag_bridge.odt
/adv_debug_sys/trunk/Software/adv_jtag_bridge/doc/src/ajb_block_diagram.odg
/adv_debug_sys/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/legacy_dbg_commands.h
/adv_debug_sys/trunk/Software/adv_jtag_bridge/Makefile
/adv_debug_sys/trunk/Software/adv_jtag_bridge/or32_selftest.c
/adv_debug_sys/trunk/Software/adv_jtag_bridge/README
/adv_debug_sys/trunk/Software/adv_jtag_bridge/rsp-server.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.