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Subversion Repositories ddr2_sdram

[/] - Rev 4

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Last modification

  • Rev 4, 2012-06-03 16:51:21 GMT
  • Author: john_fpga
  • Log message:
    add : Testbenches (Clock,Read,Write)
Path
/ddr2_sdram/trunk/Testbench_DDR2
/ddr2_sdram/trunk/Testbench_DDR2/Clock
/ddr2_sdram/trunk/Testbench_DDR2/Clock/Clock_01_Timing.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Clock/Clock_02_Reset.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Clock/Clock_03_Period.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Clock/Clock_04_Phase_Shift.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Clock/Testbench_DDR2_Core.vhd
/ddr2_sdram/trunk/Testbench_DDR2/Read
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_01_Timing.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_02_Reset.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_03_ReadEnable.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_04_ReadCMD.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_05_ReadCMD_ACK.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_06_BurstDone.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_07_NopCMD.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_08_DataValid.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_09_DataMSB.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_10_Read_Ready.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_11_Read_OK.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Read_12_Read_Speed_165ns.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Read/Testbench_Read.vhd
/ddr2_sdram/trunk/Testbench_DDR2/Write
/ddr2_sdram/trunk/Testbench_DDR2/Write/Testbench_Write.vhd
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_01_Timing.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_02_Reset.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_03_WriteEnable.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_04_WriteCMD.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_05_DataLSB.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_06_WriteCMD_ACK.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_07_BurstDone.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_08_DataMSB.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_09_NopCMD.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_10_OK.JPG
/ddr2_sdram/trunk/Testbench_DDR2/Write/Write_Speed_187ns.JPG

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