URL https://opencores.org/ocsvn/sha256_hash_core/sha256_hash_core/trunk

Subversion Repositories sha256_hash_core

[/] [sha256_hash_core/] - Rev 8

Rev 8, 2016-07-22 15:13:29 GMT
Author: jdoin
Log message:
Streamlined VHDL code to eliminate wire and combinational "initialization", changed all 'X' to 'U' on input signals, consisted comments.

Path
/sha256_hash_core/trunk/doc/src/GV_SHA256_core.png
/sha256_hash_core/trunk/syn/sha256/gv_sha256_summary.html
/sha256_hash_core/trunk/syn/sha256/iseconfig/gv_sha256.xreport
/sha256_hash_core/trunk/syn/sha256/iseconfig/sha256.projectmgr
/sha256_hash_core/trunk/syn/sha256/isim.log
/sha256_hash_core/trunk/syn/sha256/sha256_Ki_rom.vhd
/sha256_hash_core/trunk/syn/sha256/sha256_padding.vhd
/sha256_hash_core/trunk/syn/sha256/sha256_regs.vhd