Alwcpu - A light weight CPU :: Overview
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Details
Name: alwcpu
Created: May 9, 2009
Updated: Oct 26, 2010
SVN Updated: Jun 7, 2009
SVN: Browse
Latest version: download
Statistics: View
Other project properties
Category: Processor
Language: VHDL
Development status: Alpha
Additional info:
Design done, Specification done
WishBone Compliant: Yes
License: LGPL
Description
Alwcpu is a light weight CPU in terms of logic resources.
- 16 bit address and data bus. (Instructions are 16 bit as well)
- Wishbone interface
- Is parameterizable to optimize size, e.g. skipping of instruction groups, selectable 8 or 16 registers...
- Core size is about 52-55 FF and 335-478 LUT's (depending on configuration) in a Spartan 3-400 when compiled for Area.
- The core has 4 special registers and 4(*4) general purpose registers in minimum configuration
- If more registers needed another 8(*2) registers could be enabled through configuration. See documentation for the CPU.
- Some binary combinations for instructions are left reserved for the future for more instructions.