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Details

Name: spdif_interface
Created: Apr 12, 2004
Updated: Dec 17, 2018
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 1 solved
Star3you like it: star it!

Other project properties

Category:Communication controller
Language:VHDL
Development status:Stable
Additional info:Design done, FPGA proven, Specification done
WishBone compliant: Yes
WishBone version: n/a
License: LGPL

Description

The SPDIF interface (Standard IEC958 "Digital audio interface") allows transmission of digital audio signals between devices in a digital format. The goal of this project is to allow a controller/cpu with Wishbone interface to transmit and receive digital audio.

Features

- Separate transmitter and receiver
- Dual sample buffer architecture with configurable buffer size
- Access to channel status and subframe bits
- Supports both 16bit and 32bit data bus

Status

- SPDIF Interface V1.1 has been released.