Ultimate CRC :: Overview
Project maintainers
Details
Name: ultimate_crc
Created: May 5, 2005
Updated: Oct 22, 2007
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download
Statistics: View
Other project properties
Category: ECC core
Language: VHDL
Development status: Stable
Additional info:
ASIC proven, Design done, FPGA proven, Specification done
WishBone Compliant: No
License: GPL
Description
Ultimate CRC is a CRC generator/checker. Using generics the core can be fully customized. It creates a function of the data input and the CRC register using XOR-logic. Although the levels of logic gets very high for wide data inputs, the throughput still benefits from this architecture, as can be seen from the synthesis page.