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uTosNet Framework :: Overview

Project maintainers

Details

Name: utosnet
Created: Feb 25, 2010
Updated: Aug 26, 2011
SVN Updated: Aug 29, 2011
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Other
Language: VHDL
Development status: Beta
Additional info: Design done, FPGA proven, Specification done
WishBone compliant: No
WishBone version: n/a
License: LGPL

About the uTosNet project

uTosNet (pronounced microTosNet) is developed at the University of Southern Denmark ( http://www.sdu.dk ), and is intended to:

  • Reduce the development time of experimental robotic controllers to arrive faster and cheaper at fully working demonstrations of new technology and concepts.
  • Increase the reusability of experimental systems and components, thus increasing the life-span and utilization of these, and reducing the amount of redundant work.
  • Ease the use of interacting with experimental low-level controller, to open experimental robotics up to a wider audience, and to allow high-level developers a tighter integration with the physical robots, without involving them in the low-level particulars of embedded systems.
Until now uTosNet has only been used inhouse for a number of projects. We would very much like to get feedback, opinions, ideas and comments from others though - anything will be appreciated!

Also have a look at TosNet for the full-blown, multi-node version of TosNet.

- Simon Falsig
University of Southern Denmark

Description

The uTosNet framework aims at providing a very fast method for interfacing physical components, such as motor drivers, ADCs, encoders, and similar, to applications on a PC.
The framework is based on the Node-on-Chip architecture (link to paper coming).

It works by utilizing a dual-port BlockRam in the FPGA, with one port exposed to access from the PC (through uTosNet) and the other port exposed to access from user-defined modules. This allows easy and generic storage of process variables.

Currently two versions of uTosNet are supported:

  • PC side USB converter chip UART FPGA
  • PC side Ethernet Digi Connect ME 9210 microcontroller module SPI FPGA

Note that the UART version does NOT include an implementation of a UART. It has however been prepared for use with the UART implementation from the PicoBlaze processor, which is available as a free download from Xilinx here.

Currently available on SVN

Currently, the following files are available for download from the project SVN server:

  • Documentation:
    • uTosNet userguide
    • Embedix Spartan3AN-50 documentation
  • Gateware:
    • FPGA-side code for uTosNet (except the uart functionality itself)
    • USB/RS232 example
    • Ethernet/SPI example
    • uTosNet UART controller example
  • Hardware:
    • PCB design files for a very simple FPGA board based on the Spartan3 50AN, and an add-on board with extra connectors, leds, the USB/UART converter chip and the Digi Connect ME 9210 module.
  • Software:
    • A simple commandline application for use with the Ethernet/SPI version (a simple terminal emulation program, such as PuTTY or HyperTerminal, can be used with the USB/UART version)
    • C++ source code for the Ethernet version, for use with the Digi ME 9210

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