OpenCores

The VHDL Test Bench :: Overview

Project maintainers

Details

Name: vhld_tb
Created: Mar 27, 2007
Updated: Sep 4, 2014
SVN Updated: Aug 19, 2014
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Testing / Verification
Language: VHDL
Development status: Stable
Additional info: ASIC proven, Design done, FPGA proven, Specification done
WishBone compliant: No
WishBone version: n/a
License: BSD

Overview

The VHDL test bench is a collection of VHDL procedures and functions which allow the user to create their own scripting instructions for test stimulus. The stimulus script or test case contains the instructions in a regular ASCII text file. The function of the instructions is coded in VHDL as part of the test bench. The test bench VHDL package contains procedures to create instructions, read, parse and execute the test script (stimulus file, test case, script).

-------------------------------------------
June 10, 2009
This update of the Overview page was to clean up the duplicate text. An update fixing a current bug report, and request will happen shortly.

--------------------------------
June 20, 2009
Commit fix to variable addition/validation bug here: http://opencores.org/?do=viewbug&bug=467
Update example to match the package version here: http://opencores.org/?do=viewbug&bug=472

----------------------------------------
April 19, 2014
Commit the VHDL Test Bench Package as is released on my privet download site.
This includes one minor fix, and one upgrade to enable an undefined number of parameters for a command.
Also, another example and a code snips file with more examples and code to copy.
Open Office does not enable the output of PDF files (my latest version ..), so only Open Office output is
included for the documentation. Details of the changes are document.

The ttb_gen_gui tool has also been updated to enable more VHDL syntax parsing. Multi pin definitions
on a single line are now supported.

----------------------------------------
Aug. 19 2014
Change licensing of the VHDL Test Bench Package to BSD-2 clause
Remove duplicate copies of package files from packet_gen example
Remove old versions of ttb_gen application, rename most recent version to ttb_gen_gui

© copyright 1999-2017 OpenCores.org, equivalent to ORSoC AB, all rights reserved. OpenCores®, registered trademark.