Ethernet 10GE MAC :: Overview

Project maintainers

Details

Name: xge_mac
Created: May 19, 2008
Updated: Dec 13, 2009
SVN Updated: May 24, 2009
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Communication controller
Language: Verilog
Development status: Stable
Additional info: Design done, FPGA proven, Specification done
WishBone Compliant: Yes
License: LGPL

Description

The 10GE MAC Core implements the Media Access Control functions for 10Gbps operation as defined in IEEE Std 802.3ae.

Features

- Interfaces
- XGMII Interface (64-bit single clock edge)
- POS-L3 like Interface for core logic side
- Wishbone Interface for control
- Inter-Frame GAP
- Deficit Idle Count per Clause 46
- Pause Frames
- Received Pause Frames filtering
- Receive Indication
- LAN mode operation
- Link Status
- Local Fault Detection
- Remote Fault Detection/Indication
- Low-latency flow-through mode

Status

- (05/31/08) Verilog code completed
- (06/06/08) SystemC and Verilog simulations completed
- (03/06/09) Validated in FPGA
- (12/13/09) Changed packet interface to big endian
- (12/13/09) Added SERDES examples to tb_xge_mac.v

Future Developments

- RMON Statistics
- WAN mode operation
- Store-and-forward mode

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