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layer[2] :: Overview

Project maintainers

Details

Name: layer2
Created: May 1, 2012
Updated: Jul 16, 2012
SVN Updated: Jul 15, 2012
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: System on Chip
Language: VHDL
Development status: Beta
Additional info: Design done, FPGA proven, Specification done
WishBone compliant: No
WishBone version: n/a
License: GPL

layer[2] SoC

Components

The following components are implemented and tested on silicon:
  • MIPS I(tm) CPU @ 50MHz
  • Intel StratFlash
  • PS/2 Keyboard
  • 100x37 8-Color Text-VGA
  • 19200/8N1 RS-232 Receiver/Transmitter
  • 512 MBit DDR Ram

void Bootloader Tennmino
The picture to the left shows the start-up screen. With "void Bootloader" you can upload program images to the flash and run then on the DDR.
An example program is "Tennmino" a tetris clone for layer[2].

Acknowledgement

General Notice

Every component consists of an implementation and an interface file i*.vhd where I credited (hopefully) all resources.

Reference Projects on OpenCores

I learned alot from the projects available on OpenCores. I'd like to list all the projects I consulted the most:

Disclaimer

MIPS(R) is a registered trademark and MIPS I(TM) is a trademark of MIPS Technologies, Inc. in the United States and other countries. MIPS Technologies, Inc. does not endorse and is not associated with this project. OpenCores and Mathias Hörtnagl are not affiliated in any way with MIPS Technologies, Inc.

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