OpenCores

L2 cache

Back to bugtracker overview.

Information:
Type :: REMINDER
Status :: OPENED
Assigned to :: nobody

Description:
Many modern FPGAs have enought RAM for L2. We plan to write L2 from the scratch and join it then with the OS2WB module.

Comments:

Rozhdestvenskiy, Dmitry Mar 30, 2010

Post a comment:
Login to post comments!

Back to bugtracker overview.

© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.