OpenCores

reset

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Information:
Type :: BUG
Status :: OPENED
Assigned to :: nobody

Description:
Some parts of the design (/common/FIFO.vhd) use a synchronous reset while the rest of the design uses an asynchronous reset. It's not really a bug, but inconsistent design, and it caused a lot of trouble for me.

I think the whole design should use either synchronous or asynchronous reset

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