hi
i am not able to figure out the significance of the following signals
MRxDEqD and MRxDEq5. Also in VHDL i have to declare the abovesaid as
varibles which is only possible in a process and these signals are used in
the portmappings so how do i do it?

Could anyone help me out?

thanks in advance

I am afraid you haven't understood the basics of VHDL programming. Signals and variables are very different from ordinary programming language likes C. Explaining this in an email so a beginner can understand it, is impossible! You must first take a basic VHDL course before you can start doing a complex task like an Ethernet mac core. Best regards Peter Sørensen -----Original Message----- From: ethmac-bounces@opencores.org [mailto:ethmac-bounces@opencores.org]On Behalf Of yogeshdengale@yahoo.com Sent: 1. marts 2004 14:45 To: ethmac@opencores.org Subject: [ethmac] info regarding signal MRxDEqD and MRxDEq5 hi i am not able to figure out the significance of the following signals MRxDEqD and MRxDEq5. Also in VHDL i have to declare the abovesaid as varibles which is only possible in a process and these signals are used in the portmappings so how do i do it? Could anyone help me out? thanks in advance _______________________________________________ http://www.opencores.org/mailman/listinfo/ethmac