RE: PCI CORES
by Nable80 on Jul 4, 2012 |
Nable80
Posts: 10 Joined: Dec 28, 2011 Last seen: Oct 13, 2024 |
||
> does not start at all.
That changes things completely. I've re-read the topic. As far as I understand, you are using physical PC (not a simulator) and some board with PCI interface and CPLD on it. I've found model number of CLPD but nothing about the board itself. Could you provide information about card itself? Then, do you have POST PCI card or some other diagn.tool? May be your board holds RESET# or INT# pin active or conflicts with some other card in IO or MMIO space, so BIOS fails to init devices. |
RE: PCI CORES
by xgx2000 on Jul 5, 2012 |
xgx2000
Posts: 7 Joined: May 15, 2012 Last seen: Aug 11, 2014 |
||
> does not start at all.
That changes things completely. I've re-read the topic. As far as I understand, you are using physical PC (not a simulator) and some board with PCI interface and CPLD on it. I've found model number of CLPD but nothing about the board itself. Could you provide information about card itself? Then, do you have POST PCI card or some other diagn.tool? May be your board holds RESET# or INT# pin active or conflicts with some other card in IO or MMIO space, so BIOS fails to init devices. i changed a pc, the system can start,but can not detect the pci card,no matter whether i have install the linux system. and i am using a board with a xilinx spartan3e-500,which was designed by e-element company.the schematic is in the attachment.look forward your help~
EDK-3SEPCI_Schemaics.pdf (745 kb)
|
RE: PCI CORES
by Nable80 on Jul 5, 2012 |
Nable80
Posts: 10 Joined: Dec 28, 2011 Last seen: Oct 13, 2024 |
||
Situation looks mad..
1. Was you board shipped with some test firmware? 2. May be you can google the model of your board and find if anyone has successfully use it. 3. And last variant is to double check your HDL design, i mean pins' assignment. 4. Maybe you have oscilloscope or logic analyzer, then you can check if there are any problems such as holding some PCI pins active or other things. |
RE: PCI CORES
by xgx2000 on Jul 9, 2012 |
xgx2000
Posts: 7 Joined: May 15, 2012 Last seen: Aug 11, 2014 |
||
Situation looks mad..
1. Was you board shipped with some test firmware? 2. May be you can google the model of your board and find if anyone has successfully use it. 3. And last variant is to double check your HDL design, i mean pins' assignment. 4. Maybe you have oscilloscope or logic analyzer, then you can check if there are any problems such as holding some PCI pins active or other things. i'm back with the problem sill not be solved.i checked my design,find that the interrupt signal in the pci32tlite use the INTB, but on my board there is only the INTA.so i assign the INTB signal to INTA port.and the REQ and GNT port which are related to the bus master.do i need to do something to these two signal in the pci32tlite program? and if the deviceID has some relationship with the INT signal accordding to the PCI agreement. |
RE: PCI CORES
by djj08230 on Jul 9, 2012 |
djj08230
Posts: 1 Joined: Jun 25, 2008 Last seen: Sep 18, 2015 |
||
Just a quick comment you might find useful.
Some years ago I developed my own PCI core. I did (more or less) the following: - I wrote a testbench that simulated the PCI host. - I wrote my core which was slave only. - When all simulated OK, I gave a try on real hardware. (under linux of course) The system didn't work at all, but I was quite confident with my design. It turned out that there was some flag with the FPGA environment (Spartan X3S) that needed to be configured. This flag kept the I/O pins tri-stated while configuring the FPGA. So, my point is: check, double check, triple check... and then, there may be some minor issue, very specific to your particular board or FPGA. Good luck. |
RE: PCI CORES
by peio on Jul 10, 2012 |
peio
Posts: 19 Joined: Nov 25, 2004 Last seen: Dec 20, 2023 |
||
The interrupt signal is named INTB but you can connect to INTA if you want (read PCI spec).
deviceID is not related with INT. You could left INTB signal unconnected and, if your fpga code is well done, the PC will start up ok. As djj08230 points, check, double check your fpga code and configuration options: - reset - int - pin assignment - I/O configuration (ALTERA has a PCI option for I/O pins). Peio |
RE: PCI CORES
by Estebam on Jan 17, 2014 |
Estebam
Posts: 1 Joined: Oct 15, 2013 Last seen: Apr 11, 2014 |
||
Peio, your core pci work it with diferents cyclone fpgas? Or only with cyclone II? Is possible with cyclone III?
|
RE: PCI CORES
by peio on Aug 5, 2014 |
peio
Posts: 19 Joined: Nov 25, 2004 Last seen: Dec 20, 2023 |
||
The pci32tlite works with any PCI compatible FPGA family.
|
RE: PCI CORES
by vinoth2284 on Sep 19, 2014 |
vinoth2284
Posts: 1 Joined: Jun 25, 2014 Last seen: Sep 23, 2014 |
||
**
write some debug logic, to find the config reads have happened correctly by setting some led lights on or use signal tap analyser to check the pci interface signals. ** |
RE: PCI CORES
by alex_beltran1 on Aug 24, 2020 |
alex_beltran1
Posts: 1 Joined: Sep 12, 2014 Last seen: Aug 24, 2020 |
||
Hi, ineed to implement a PCI card and looking for PCI cores at OC i found 2 promising cores. PCI Bridge and PCI32tlite. Any one have any coment about both cores? I have read at another post here at the forum that the second one (PCI32tlite) is faster. Any reason for that? I was not able to send e-mails to the PCI_Bridge authors. Is there any way to contact them?
Thank you |
RE: PCI CORES
by peio on Aug 25, 2020 |
peio
Posts: 19 Joined: Nov 25, 2004 Last seen: Dec 20, 2023 |
||
Depends on the PCI functionality you need.
pci32tlite it's a "PCI target" core, and therefore easier to implement than others cores with "PCI Master/Target" functionality. I've been using this core in different projects with different FPGAs for more than 10 years. |