Avalon AES ECB-Core (128, 192, 256 Bit)

When selecting roundkeys a division operation is done in keyexpansion.vhd This is no problem with 128 Bit or 256 bit keys because here it is i/4 or i/8 which is a shift-right operation, however with 192 bit its i/6 which cannot be achieved with simple shift operation. Quartus synthesizes w/o problems, ISE Webpack doesn't - maybe implementa a generic or a different roundconstant table that works w/o division....

ocadmin: just testing to add a comment

Sorry don't have Xilinx ISE, and nobody sofar complained about this bug anyway... won't fix