I use the MAC IP core for fast transmission of measurement data with my proprietary Ethernet protocol. I have noticed, that when I quickly transmit packets data (each packet is ca 1100 bytes long), I get corrupted packets. E.g. some packets are lost or some packets are "glued" together. I use the Tx_mac_wa signal to state when I can write next data word. The problem disappears, when I enter delay of 10000 user clock pulses between packets. My setup is: Spartan 3E Starter Kit board with full duplex 100MHz PHY.
I have found the cause - it was instantiation of duram modules. I have set both MAC_TX_FF_DEPTH and MAC_RX_FF_DEPTH to 14. However duram is instantiated with address width set to 9 (for Xilinx). Therefore the occupancy of FIFO was calculated basing on assumption that dual port RAM memory size is equal to 2^14, while in fact it is 2^9. This causes overlapping of packet data in RAM.
The best solution would be to pass the address width as parameter. The simplest solution may be to increase the address width in the duram.v file.
OK. I wasn't right in my previous comment. The address width is passed as a parameter. However for some reason. The DP RAM with capacity of 2^9 is used in mac_tx_ff instead of 2^14 DP_RAM :-(
The real cause of the problem was the implementatation of the duram.v using the RAMB16_S36_S36 block. This block has address width of 9 bits.
Therefore without changing of duram.v implementation we have to set MAC_TX_FF_DEPTH and MAC_RX_FF_DEPTH to value not exceeding 9!