Dear Sir,
I have downloaded verilog files from the repository. The design files are not synthesisable. The fpAddsub.v module consist redor64 instantiation. I was could not able to find that module. Please upload the "redor64" module.
Thanks and Regards, Srikanth
redor64 module uploaded, there may be other missing library files which will prevent synthesis of the fp* modules. The FT816Float module should be synthesizable.