I2C controller core

Hello,

in the i2c_slave_model in state "data" when reading (rw=1) the following code

sda_o <= #1 mem_do7;

fixes sda_o to the MSB of the memory output. It is not shifted and not indexed to output the next bit on the next clock edge and it continuously outputs mem_do7 on the sda line.

I just noticed this and went through the requests/bugs but did not see anything relevant. Excuse me if this has been fixed/altered already.

Evros