OpenCores

I2C Master Slave Core

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interrupt #1
Closed gach opened this issue about 15 years ago
gach commented about 15 years ago

the interrupt pin is not controlled

vassago057 commented about 15 years ago

well, it is obviously not a bug. it could be a bug if it was controlled uncorrectly.

it is just a rudimentary pin that is being optimized during synthesis.

vassago057 closed this about 15 years ago
vassago057 commented about 15 years ago

well, it is obviously not a bug. it could be a bug if it was controlled uncorrectly.

it is just a rudimentary pin that is being optimized during synthesis.

vassago057 commented about 15 years ago

well, it is obviously not a bug. it could be a bug if it was controlled uncorrectly.

it is just a rudimentary pin that is being optimized during synthesis.


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